Objective

Position : Senior RFIC Design Engineer


Summary
Date of Birth : 27/01/1973
Gender : Male


Employment

September, 1995 -  July, 1999

September, 1991 -  July, 1995

January, 2002 -  September, 2007

October, 2007 -  Present

Current Position : Senior Project Lead

Duties and Achievements in the chronological order
January 2002 - November 2002 as RFIC Design Engineer Participated in the design and development of The Single-Chip Bluetooth IC as a principal development member of its RFIC transceiver. The different versions of RF VCOs operating at 2.5GHz and 5GHz were developed using 0.35um and 0.18um CMOS/BiCMOS technology with Chartered Semiconductor Manufacturing Processing CSM 0.35um and Taiwan Semiconductor Manufacturing Processing TSMC 0.18um respectively. Some high performance planar spiral inductors high ratio of effective inductance to die area occupied were designed applied in the development of new generation Bluetooth System. Good evaluation results were obtained.

December 2002 - November 2003 as RFIC Design Engineer Participated in the design and development of The Wireless Local Area Network WLAN RFIC Chip as a principal development member. The responsibilities include the modeling and development of passive RF components transmission lines and spiral inductors operating at 1.3, 2.5 and 5.1GHz, respectively. 3 groups of new type three-port, multi-metal layer spiral inductors with high self resonant frequency SRF, quality factor Q and smaller die size compared with equivalent two-port ones were developed for differential RFIC applications. The development and design of the test structures of the active devices RF transistors and other passive components Varactors, MIM caps, RF resistors, ESD pads etc are the responsibilities as well.

December 2003 - July 2005 as RFIC Design Engineer Participated in the design and development of The Electronic Toll Collection ETC RFIC Chip. As a principal development member, the responsibilities include development and design of RF voltage controlled oscillator RF VCO and the modeling of passive components transmission lines and spiral inductors etc.. The RF VCO operating at 5.85 GHz with wide frequency tuning range 160MHz low phase noise 110dBc/Hz offset frequency, full linear voltage tuning range 0 to Vdd and flexible frequency tuning capability was developed and applied in the IC chip.

August 2005 - Feburary 2007 as Senior RFIC Design Engineer Participated in the design and development of The UWB RFIC Chip. As a principal development member, the responsibilities are in charge of the design and development of up-conversion I/Q modulator, power amplifier PA and power detector for LO leakage and image power level calibration purposes using 90nm technology, good evaluation results were obtained.

January 2007 - April 2007 as Senior RFIC Design Engineer Participated in the design and development of the RFIC Receiver for WLAN Applications. As a principal development member, the responsibility is in charge of the design of I/Q down-conversion mixer using 90nm technology. In this design, a current-mode mixer with low noise figure around baseband frequency and variable gain 2 to 10dB is developed.

May 2007 - Present as Senior Project Lead Participated in the design and development of the RFIC Transceiver for RFID Applications. As a principal development member, the responsibility is in charge of the design of 13MHz, 900MHz and 2.4GHz ASK modulator drivers using 90nm technology. In this design, 1 ASK modulator and 3 drivers are developed. Currently, the chip is taped-out for mass-production.

June 2008 - Present as Senior Project Lead Participated and in charge of the evaluation of 90nm PDK for a new foundry and providing improvement proposals on the new PDK so that it is applied in different wireless applications ; participated and in charge of the development of advanced 55nm/40nm PDK for future mm-wave applications.

November, 2000 -  October, 2001

Position : Research Assistant

Participated in the project of A High Frequency Multilayer Circuit Design Technique of Field Theory for EM couplings with Consideration to Thermal conduction as a principal research member responsible for the RF circuits and systems analysis and design with assistance of commercial softwares. Computer-aided designs and simulations, class A RF power amplifiers , 2GHz and 5.8GHz, class E RF oscillator , injection-locked oscillators and 250MHz low voltage VCOs , 2.5GHz and low voltage mixer were accomplished and their EM couplings were investigated as well for improving their performance. The research results are applied on the design of multilayer high frequency circuits.

September, 1999 -  October, 2000

Position : Research Assistant

Participated in the project of Measures, Analysis and Prevention Theory of Spurious Capacitive and Inductive Couplings between Multilayer Circuit Boards, through Dielectric Casings of ICs and Ground Loops as a research member with the responsibility of designs and simulations of the RF passive components, ie, spiral inductors and planar capacitors etc.. Based on these designs, their high frequency performance known as capacitive and inductive couplings in different circuit boards was studied through measurements and simulations to put forward the related EM prevention theory.

July, 1997 -  September, 1999

As a PhD student, the responsibility included digital time signal transmission and signal-processing circuits design, system testing and evaluation in the project Design Technique of Communication Link and Harmonicity between Fuze System and Launching Platform, 1 of the key national Ninth Five-Year Plan scientific projects. In this project, the electro-magnetic induction EMI technology was applied to complete the digital signal transmission in a short time interval. The full signal transmission circuit was designed and evaluated. Good measured results were obtained as well.

September, 1995 -  October, 1997

As a PhD student and a principal development member of the project Program Control Technology for A New Type of Fuze Safety System also a key national Eighth Five-Year Plan scientific project, the responsibilities contained the analog and digital circuits design for wind velocity signal recognition and processing, system testing. The software applied in monolithic ICs for velocity signal recognition and processing was developed and this software together with the hardware mentioned above, could classified the velocity of the wind into 3 types for further different functions.

Skills
Experienced in the EM simulation software HP Momentum and Sonnet ; Experienced in RF/RFIC Circuit simulation software HP ADS and Cadence Spectra RF etc.; Experienced in layout software Cadence ; Familiar with Unix workstation environment. Appendix :
1. C.N. Nam, ZHENG Chuanjun and K.F. Tsang, A Synchronous Oscillator Mixer, pp. 271 274 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, Hong Kong, December 2000. 2. W.H. Chen, ZHENG Chuanjun and K.F. Tsang, Integral Subharmonic Injection-Locked Oscillators, pp. 275 278 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, Hong Kong, December 2000. 3. C.M. Yuen, ZHENG Chuanjun and K.F. Tsang, Phase Noise Modeling for Direct Memory Access DMA Frequency Synthesizer, pp. 291 294 Cross Strait Tri-regional Radio Science and Wireless Technology Conference, Hong Kong, December 2000.